CAN

This page documents the CAN configuration.

Configuration file fields

This section is autogenerated from the Rule Schema file.

Bit-rate configuration mode phy.can.bit_rate_cfg_mode

Configures how the CAN bus bit-rate is set. Bit-rate supports all standard bit-rates. Non-standard bit-rate configuration can be set using Bit-timing.

Type Default Options
integer 0

Bit-rate (simple): 0 Bit-timing (advanced): 1

Bit_rate_std phy.can.bit_rate_std

Bit_rate_fd phy.can.bit_rate_fd

Configuration explained

This section contains additional information and examples.

The input clock to the CAN-bus controller is set to 40MHz.

The bit-rate mode Bit-rate (simple) supports the following list of bit-rates[1]:

Bitrate

BRP

Quanta

Seg1

Seg2

SJW

5000

100

100

63

16

4

10000

50

100

63

16

4

20000

25

100

63

16

4

33333

10

120

95

24

4

47619

8

105

83

21

4

50000

10

80

63

16

4

83333

4

120

95

24

4

95238

4

105

83

21

4

100000

5

80

63

16

4

125000

4

80

63

16

4

250000

2

80

63

16

4

500000

1

80

63

16

4

800000

1

50

39

10

4

1000000

1

40

31

8

4

2000000

1

20

15

4

4

4000000

1

10

7

2

2

In bit-rate mode Bit-timing (advanced), the bit-rate timing can be set directly. The following equations can be used to calculate the bit-timing fields:

  • Input clock: \(CLK = 40\text{ MHz}\)

  • Quanta: \(Q = 1 + SEG_1 + SEG_2\)

  • Bit-rate: \(BR = \frac{CLK/BRP}{Q}\)

  • Sample point: \(SP = 100 \cdot \frac{1 + SEG_1}{Q}\)

Examples

Example: Matching bit-timing settings based on different input clock frequency (CLK).

Settings to match (based on a 80MHz input clock):

  • Bit-rate: 2M

  • Quanta: 40

  • SEG1: 29

  • SEG2: 10

  • Sample point: 75%

Above settings are based on an input clock with frequency:

\[CLK = BR \cdot Q = 2000000 \cdot 40 = 80\text{ MHz}\]

The CANmod.input uses a 40MHz input clock. To obtain a bit-rate of 2 M with a 40 MHz input clock, the number of quanta is calculated as:

\[Q = \frac{CLK/BRP}{BR} = \frac{40000000/1}{2000000} = 20\]

To obtain a sampling point of 75%, SEG1 is calcualted as:

\[SEG_1 = \frac{SP \cdot Q}{100} - 1 = \frac{75 \cdot 20}{100} = 14\]

Now, SEG2 is calculated as:

\[SEG_2 = Q - SEG_1 - 1 = 20 - 14 - 1 = 5\]

The equivalent bit-timing settings using the 40 MHz input clock of the CANmod.input becomes:

  • BRP: 1

  • SEG1: 14

  • SEG2: 5